Abstract
In this paper, the dual band low noise amplifier is designed in 0.18-μm CMOS technology. By combining the proposed switchable load inductor for gain controlling and the conventional inductive source degeneration topology, narrow band gain and good impedance matching are achieved at 2.3/3.3-GHz frequency bands. The new mathematical analysis of low noise amplifier design is derived to define the component parameters of the proposed circuits. The proposed low noise amplifier exhibits gain of 17.18 dB and 15.5 dB, and noise figure of 2.67 dB and 2.52 dB at the two frequency bands, respectively.
Bahasa Abstract
Penguat Derau Rendah Pita Ganda 2,3/3,3-GHz dengan Menggunakan Induktor Beban yang dapat Dialihkan di dalam Teknologi CMOS 0,18-m. Pada paper ini, dual band low noise amplifier didesain menggunakan teknologi CMOS 0.18-μm. Dengan mengkombinasikan usulan switchable load inductor sebagai pengendali gain dan topologi konvensional inductive source degeneration, gain dengan lebar yang sempit dan kesesuaian impedansi yang baik dapat dicapai pada frekuensi 2.3/3.3-GHz. Analisa matematika rangkaian yang baru pada desain rangkaian low noise amplifier telah dijabarkan untuk menentukan parameter-paramter komponen rangkaian yang diusulkan. Low noise amplifier yang didesain menghasilkan gain sebesar 17.18 dB dan 15.5 dB, serta noise figure sebesar 2.67 dB dan 2.52 dB pada dua pita frekuensi, secara berurutan.
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Recommended Citation
Kurniawan, Taufiq Alif and Chen, Hsiao-Chin
(2018)
"A 2.3/3.3-GHz Dual Band Low Noise Amplifier Using Switchable Load Inductor in 0.18-um CMOS Technology,"
Makara Journal of Technology: Vol. 22:
Iss.
3, Article 7.
DOI: 10.7454/mst.v22i3.3666
Available at:
https://scholarhub.ui.ac.id/mjt/vol22/iss3/7
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